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DTSTART;TZID=Europe/Rome:20260420T131500
DTEND;TZID=Europe/Rome:20260420T140000
LOCATION:Room Auditorium
CREATED:20260421T174602
DTSTAMP:20260421T174602
SUMMARY:LK01 IEEE CEDA Distinguished Lecturer Lunchtime Keynote "Unifying Accelerator Design and Programming for Evolvable Computing"
URL;VALUE=URI:https://date26date-conference.com/programme#LK01
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DESCRIPTION:Get the latest session information at 
	https://date26date-conference.com/programme#LK01\n\n\nWe are living 
	through a fundamental shift in computing, where performance and efficiency 
	gains increasingly come from specialised accelerators tailored to "hot" 
	domains like AI. Yet as accelerator-centric computing proliferates, it 
	continues to build atop a longstanding disconnect between the way we 
	design these systems and the way we program them. This divide slows 
	hardware innovation, complicates the software stack, and makes 
	accelerators far harder to evolve than the rapidly changing applications 
	they are meant to serve.\nIn this talk, I will present our recent research 
	on closing this gap through a unified hardware-software co-design stack. 
	At the core is a new abstraction that generalises single program multiple 
	data beyond largely independent threads to encompass spatial structure and 
	communication. It offers a single, composable model for expressing both 
	how accelerators are constructed and how they are programmed. I will show 
	how this abstraction is realised in Allo, an open-source, Python-based, 
	MLIR-powered framework to enable concise specifications that map 
	efficiently across FPGA, ASIC, NPU, and GPU platforms. I will conclude 
	with a forward-looking perspective on automated compiler construction, 
	differentiable hardware synthesis, and agentic design automation, and 
	discuss how these directions may help move us toward truly evolvable 
	heterogeneous computing.\nIn this talk, I will present our recent research 
	on closing this gap through a unified hardware-software co-design stack. 
	At the core is a new abstraction that generalizes single program multiple 
	data beyond largely independent threads to encompass spatial structure and 
	communication. It offers a single, composable model for expressing both 
	how accelerators are constructed and how they are programmed. I will show 
	how this abstraction is realized in Allo, an open-source, Python-based, 
	MLIR-powered framework to enable concise specifications that map 
	efficiently across FPGA, ASIC, NPU, and GPU platforms. I will conclude 
	with a forward-looking perspective on automated compiler construction, 
	differentiable hardware synthesis, and agentic design automation, and 
	discuss how these directions may help move us toward truly evolvable 
	heterogeneous computing.
X-ALT-DESC;FMTTYPE=text/html:<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN"><HTML><HEAD><META 
	NAME="Generator" CONTENT="MS Exchange Server version 
	16.0.17231.20290"><TITLE></TITLE></HEAD><BODY><p>Get the latest session 
	information at <a 
	href="https://date26date-conference.com/programme#LK01">https://date26date-conference.com/programme#LK01</a></p><div>We 
	are living through a fundamental shift in computing, where performance and 
	efficiency gains increasingly come from specialised accelerators tailored 
	to "hot" domains like AI. Yet as accelerator-centric computing 
	proliferates, it continues to build atop a longstanding disconnect between 
	the way we design these systems and the way we program them. This divide 
	slows hardware innovation, complicates the software stack, and makes 
	accelerators far harder to evolve than the rapidly changing applications 
	they are meant to serve.In this talk, I will present our recent research 
	on closing this gap through a unified hardware-software co-design stack. 
	At the core is a new abstraction that generalises single program multiple 
	data beyond largely independent threads to encompass spatial structure and 
	communication. It offers a single, composable model for expressing both 
	how accelerators are constructed and how they are programmed. I will show 
	how this abstraction is realised in Allo, an open-source, Python-based, 
	MLIR-powered framework to enable concise specifications that map 
	efficiently across FPGA, ASIC, NPU, and GPU platforms. I will conclude 
	with a forward-looking perspective on automated compiler construction, 
	differentiable hardware synthesis, and agentic design automation, and 
	discuss how these directions may help move us toward truly evolvable 
	heterogeneous computing.In this talk, I will present our recent research 
	on closing this gap through a unified hardware-software co-design stack. 
	At the core is a new abstraction that generalizes single program multiple 
	data beyond largely independent threads to encompass spatial structure and 
	communication. It offers a single, composable model for expressing both 
	how accelerators are constructed and how they are programmed. I will show 
	how this abstraction is realized in Allo, an open-source, Python-based, 
	MLIR-powered framework to enable concise specifications that map 
	efficiently across FPGA, ASIC, NPU, and GPU platforms. I will conclude 
	with a forward-looking perspective on automated compiler construction, 
	differentiable hardware synthesis, and agentic design automation, and 
	discuss how these directions may help move us toward truly evolvable 
	heterogeneous computing.</div></BODY></HTML>
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