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DTSTART;TZID=Europe/Rome:20260421T163000
DTEND;TZID=Europe/Rome:20260421T180000
LOCATION:Room Auditorium
CREATED:20260421T174602
DTSTAMP:20260421T174602
SUMMARY:FS06 Focus Session: Who is Best Suited to do Verification? (Panel)
URL;VALUE=URI:https://date26date-conference.com/programme#FS06
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DESCRIPTION:Get the latest session information at
https://date26date-conference.com/programme#FS06\n\n\nDespite many
improvements and a continuously increasing number of engineers verifying
and validat-ing designs, the number of re-spins required for a working
chip is continuously increasing, so Harry D. Foster – Chief Scientist
Verification at Siemens EDA – in the 2024 Wilson Research Group IC/ASIC
func-tional verification trend report. This session approaches the
long-lasting topic of the verification gap by discussing if the right
people with the right skills are responsible for verification:
Verification Engineers, Design Engineers, or Concept Engineers. We discuss
how roles, skills and responsibilities may be dis-tributed among these
groups with the goal to make verification more efficient, with a higher
quality and less costly. The session is structured in three 15 minutes
impulse talks followed by 45 Minutes discussion amongst the panelists and
the auditorium.
X-ALT-DESC;FMTTYPE=text/html:Get the latest session
information at https://date26date-conference.com/programme#FS06
Despite
many improvements and a continuously increasing number of engineers
verifying and validat-ing designs, the number of re-spins required for a
working chip is continuously increasing, so Harry D. Foster – Chief
Scientist Verification at Siemens EDA – in the 2024 Wilson Research
Group IC/ASIC func-tional verification trend report. This session
approaches the long-lasting topic of the verification gap by discussing if
the right people with the right skills are responsible for verification:
Verification Engineers, Design Engineers, or Concept Engineers. We discuss
how roles, skills and responsibilities may be dis-tributed among these
groups with the goal to make verification more efficient, with a higher
quality and less costly. The session is structured in three 15 minutes
impulse talks followed by 45 Minutes discussion amongst the panelists and
the auditorium.
UID:DATE-FS06-20260421T163000-20260421T180000
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