BEGIN:VCALENDAR VERSION:2.0 PRODID:-//DATE2026//date-conference.com//EN CALSCALE:GREGORIAN METHOD:PUBLISH BEGIN:VEVENT DTSTART;TZID=Europe/Rome:20260422T083000 DTEND;TZID=Europe/Rome:20260422T100000 LOCATION:Room Rigoletto CREATED:20260421T174602 DTSTAMP:20260421T174602 SUMMARY:ET04 CANCELLED! Thermally Robust Photonic AI Chips: From Diamond and Graphene Integration to System-level Optimisation URL;VALUE=URI:https://date26date-conference.com/programme#ET04 BEGIN:VALARM TRIGGER:-PT15M ACTION:DISPLAY DESCRIPTION:Reminder END:VALARM DESCRIPTION:Get the latest session information at https://date26date-conference.com/programme#ET04\n\n\nSpeakers\n \n Dharanidhar Dang, University of Texas at San Antonio, US\n Shaloo Rakheja, University of Illinois Urbana Champaign, US\n Ahmedullah Aziz, University of Tennessee Knoxville, US\n \n Abstract\n \n Artificial intelligence workloads continue to grow in scale and complexity, pushing conventional electronic computing architectures toward limits in bandwidth, energy efficiency, and thermal reliability. Silicon photonic computing offers a promising path forward by enabling high bandwidth communication and energy efficient matrix operations using light. However, thermal effects such as self heating, thermo optic drift, and inter chiplet thermal coupling significantly impact the reliability and scalability of photonic devices including microring modulators, phase shifters, and lasers. This tutorial presents a multi scale design perspective that integrates materials, device physics, and system architecture to enable thermally robust photonic AI chips. Participants will learn how advanced materials such as diamond and graphene improve heat dissipation, how device level thermal effects can be modeled using multiphysics frameworks, and how system level architecture design can mitigate thermal hotspots in large scale photonic AI systems.\n \n Intended Audience\n \n This tutorial is intended for researchers, engineers, and practitioners working in AI hardware, electronic design automation, silicon photonics, and advanced computing architectures. The session will benefit chip architects, photonic device designers, thermal engineers, and system level designers who are interested in building scalable and energy efficient AI hardware platforms\n \n Learning Objectives\n \n Understand thermal challenges in silicon photonic AI accelerators. Learn modeling techniques for thermal transport in photonic devices. Explore the role of advanced materials such as diamond and graphene for heat management.\n Understand architecture level thermal optimization for photonic AI systems.\n \n Tutorial Outline\n \n 08:30 – 08:45 | System Level Motivation for Thermally Robust Photonic AI\n \n Speaker: Dharanidhar Dang\n \n Overview of AI hardware scaling challenges. Limitations of electronic accelerators. Introduction to silicon photonic computing and motivation for thermal aware system design.\n \n 08:45 – 09:05 | Thermal Transport and Materials for Photonic Devices\n \n Speaker: Shaloo Rakheja\n \n Thermal transport mechanisms in photonic devices. Heat generation in microring modulators and phase shifters. Use of diamond and graphene for improved thermal dissipation. Multiphysics modeling techniques.\n \n 09:05 – 09:25 | Device Reliability and Compact Thermal Modeling\n \n Speaker: Ahmedullah Aziz\n \n Thermal reliability of photonic components. Temperature induced performance variation. Compact model extraction and integration into circuit level simulation frameworks.\n \n 09:25 – 09:50 | Architecture Level Thermal Co Design\n \n Speaker: Dharanidhar Dang\n \n Thermal aware design of photonic AI accelerators. Chiplet based architectures and thermal coupling. AI workload driven thermal mapping and architecture optimization.\n \n 09:50 – 10:00 | Discussion and Future Directions\n \n Summary of key concepts and open research challenges in thermally robust photonic AI\n systems. Interactive discussion with participants.\n \n Key Takeaways\n \n Participants will gain an understanding of thermal challenges in silicon photonic AI systems, methods for modeling and mitigating thermal effects at the device level, and system level design approaches that enable scalable and reliable photonic AI accelerators. X-ALT-DESC;FMTTYPE=text/html:

Get the latest session information at https://date26date-conference.com/programme#ET04

Speakers

Dharanidhar Dang, University of Texas at San Antonio, US
Shaloo Rakheja, University of Illinois Urbana Champaign, US
Ahmedullah Aziz, University of Tennessee Knoxville, US

Abstract

Artificial intelligence workloads continue to grow in scale and complexity, pushing conventional electronic computing architectures toward limits in bandwidth, energy efficiency, and thermal reliability. Silicon photonic computing offers a promising path forward by enabling high bandwidth communication and energy efficient matrix operations using light. However, thermal effects such as self heating, thermo optic drift, and inter chiplet thermal coupling significantly impact the reliability and scalability of photonic devices including microring modulators, phase shifters, and lasers. This tutorial presents a multi scale design perspective that integrates materials, device physics, and system architecture to enable thermally robust photonic AI chips. Participants will learn how advanced materials such as diamond and graphene improve heat dissipation, how device level thermal effects can be modeled using multiphysics frameworks, and how system level architecture design can mitigate thermal hotspots in large scale photonic AI systems.

Intended Audience

This tutorial is intended for researchers, engineers, and practitioners working in AI hardware, electronic design automation, silicon photonics, and advanced computing architectures. The session will benefit chip architects, photonic device designers, thermal engineers, and system level designers who are interested in building scalable and energy efficient AI hardware platforms

Learning Objectives

Understand thermal challenges in silicon photonic AI accelerators. Learn modeling techniques for thermal transport in photonic devices. Explore the role of advanced materials such as diamond and graphene for heat management.
Understand architecture level thermal optimization for photonic AI systems.

Tutorial Outline

08:30 – 08:45 | System Level Motivation for Thermally Robust Photonic AI

Speaker: Dharanidhar Dang

Overview of AI hardware scaling challenges. Limitations of electronic accelerators. Introduction to silicon photonic computing and motivation for thermal aware system design.

08:45 – 09:05 | Thermal Transport and Materials for Photonic Devices

Speaker: Shaloo Rakheja

Thermal transport mechanisms in photonic devices. Heat generation in microring modulators and phase shifters. Use of diamond and graphene for improved thermal dissipation. Multiphysics modeling techniques.

09:05 – 09:25 | Device Reliability and Compact Thermal Modeling

Speaker: Ahmedullah Aziz

Thermal reliability of photonic components. Temperature induced performance variation. Compact model extraction and integration into circuit level simulation frameworks.

09:25 – 09:50 | Architecture Level Thermal Co Design

Speaker: Dharanidhar Dang

Thermal aware design of photonic AI accelerators. Chiplet based architectures and thermal coupling. AI workload driven thermal mapping and architecture optimization.

09:50 – 10:00 | Discussion and Future Directions

Summary of key concepts and open research challenges in thermally robust photonic AI 
systems. Interactive discussion with participants.

Key Takeaways

Participants will gain an understanding of thermal challenges in silicon photonic AI systems, methods for modeling and mitigating thermal effects at the device level, and system level design approaches that enable scalable and reliable photonic AI accelerators.

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