BEGIN:VCALENDAR VERSION:2.0 PRODID:-//DATE2025//date-conference.com//EN CALSCALE:GREGORIAN METHOD:PUBLISH BEGIN:VEVENT DTSTART;TZID=Europe/Paris:20250401T140000 DTEND;TZID=Europe/Paris:20250401T153000 LOCATION:St Clair 1 CREATED:20250320T120824 DTSTAMP:20250320T120824 SUMMARY:ET03 Lifecycle Management of Emerging Memories: Why and How? URL;VALUE=URI:https://date25.date-conference.com/programme#ET03 BEGIN:VALARM TRIGGER:-PT15M ACTION:DISPLAY DESCRIPTION:Reminder END:VALARM DESCRIPTION:Get the latest session information at https://date25.date-conference.com/programme#ET03\n\n\nAbstract:\n \n Emerging memory technologies, such as Resistive RAM (ReRAM), Phase-Change Memory (PCM), Spin-Transfer Torque Magnetic Memory (STT-MRAM), and Ferroelectric FET (FeFET), receive a lot of interest both from academia and industry thanks to their attractive properties. These technologies can implement dense, fast, and non-volatile memories that can be used to efficiently store date as well as implement AI circuits. However, mass production is still limited, because these technologies suffer from quality and reliability issues that need to be addressed after manufacturing and during lifetime. These technologies are susceptible to new manufacturing defects due to new materials and structures as well as endurance problems. This tutorial presents a holistic view on the root causes of quality and reliability issues, their impact on the circuit’s behavior, and possible solutions to properly address these issues guaranteeing the required quality and reliability level. Finally, this tutorial allows attendees to understand the lifecycle management choices available to ensure high-quality and -reliable emerging memories.\n \n Speakers:\n \n Leticia Maria Bolzani Poehls, IHP – Leibniz Institute for High Performance Microelectronics - Germany\n \n Moritz Fieback, Delft University of Technology, The Netherlands\n \n Target audience:\n \n This tutorial intends to be addressed to academia (from PhD students to postdocs) and professionals from industry that would like to know more about how to guarantee the quality of emerging memories and consequently their adoption in real applications. Around 40 participants are expected.\n \n Learning objectives:\n \n - Describe why emerging memories need lifecycle management and how this holistic approach fits in the memories’ design process\n - Present and compare the lifecycle management of two different types of emerging memories including their quality and reliability issues and possible solutions\n - Summarize the key challenges that are involved in future lifecycle management for emerging memories\n \n Required background:\n \n - Basic understanding of emerging memories and some general understanding of the definitions relate to the theory of test, and reliability.\n \n Detailed program:\n \n The proposed tutorial is based in the following plan:\n \n - Introduction: Why we need emerging memories?\n - Background: Why we need to adopt a lifecycle management approach for emerging memories?\n - Case study 1: Memory type, RRAMs\n - Case study 2: Memory type, STT-MRAMs\n - Comparison highlighting overlapping and differentiating features of two technologies\n - Conclusion & Future X-ALT-DESC;FMTTYPE=text/html:

Get the latest session information at https://date25.date-conference.com/programme#ET03

Abstract:

Emerging memory technologies, such as Resistive RAM (ReRAM), Phase-Change Memory (PCM), Spin-Transfer Torque Magnetic Memory (STT-MRAM), and Ferroelectric FET (FeFET), receive a lot of interest both from academia and industry thanks to their attractive properties. These technologies can implement dense, fast, and non-volatile memories that can be used to efficiently store date as well as implement AI circuits. However, mass production is still limited, because these technologies suffer from quality and reliability issues that need to be addressed after manufacturing and during lifetime. These technologies are susceptible to new manufacturing defects due to new materials and structures as well as endurance problems. This tutorial presents a holistic view on the root causes of quality and reliability issues, their impact on the circuit’s behavior, and possible solutions to properly address these issues guaranteeing the required quality and reliability level. Finally, this tutorial allows attendees to understand the lifecycle management choices available to ensure high-quality and -reliable emerging memories.

Speakers:

Leticia Maria Bolzani Poehls, IHP – Leibniz Institute for High Performance Microelectronics - Germany

Moritz Fieback, Delft University of Technology, The Netherlands

Target audience:

This tutorial intends to be addressed to academia (from PhD students to postdocs) and professionals from industry that would like to know more about how to guarantee the quality of emerging memories and consequently their adoption in real applications. Around 40 participants are expected.

Learning objectives:

Required background:

Detailed program:

The proposed tutorial is based in the following plan:

UID:DATE-ET03-20250401T140000-20250401T153000 END:VEVENT BEGIN:VTIMEZONE TZID:Europe/Paris TZURL:http://tzurl.org/zoneinfo/Europe/Paris X-LIC-LOCATION:Europe/Paris BEGIN:DAYLIGHT TZOFFSETFROM:+0100 TZOFFSETTO:+0200 TZNAME:CEST DTSTART:19810329T020000 RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=-1SU END:DAYLIGHT BEGIN:STANDARD TZOFFSETFROM:+0200 TZOFFSETTO:+0100 TZNAME:CEST DTSTART:19961027T030000 RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=-1SU END:STANDARD BEGIN:STANDARD TZOFFSETFROM:-001444 TZOFFSETTO:+0000 TZNAME:WET DTSTART:19010101T000000 RDATE:19010101T000000 END:STANDARD END:VTIMEZONE END:VCALENDAR