BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//DATE2024//date-conference.com//EN
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DTSTART;TZID=Europe/Madrid:20240326T083000
DTEND;TZID=Europe/Madrid:20240326T100000
LOCATION:Break-Out Room S3+4
CREATED:20240322T074734
DTSTAMP:20240322T074734
SUMMARY:ET03 Embedded Tutorial: Coarse-Grained Reconfigurable Arrays: Modelling and Exploration Using the Open-Source CGRA-ME Framework
URL;VALUE=URI:https://date24.date-conference.com/programme#ET03
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DESCRIPTION:Reminder
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DESCRIPTION:Get the latest session information at 
	https://date24.date-conference.com/programme#ET03\n\n\nCoarse-grained 
	reconfigurable arrays (CGRAs) are programmable hardware devices within the 
	broader umbrella of reconfigurable architectures. They are promising 
	candidates for the realization of application accelerators. In contrast to 
	FPGAs, CGRAs are configurable at the word level, rather than the bit 
	level. This distinction positions CGRAs to deliver power, performance, and 
	area characteristics more closely aligned with custom ASICs. Notably, the 
	emergence of numerous machine-learning accelerator startups, such as 
	Tenstorrent, Groq, Cerebras, and SambaNova, offer architectures that 
	closely resemble CGRAs.\n	\n	CGRA-ME is an open-source CGRA modeling and 
	exploration framework actively being developed at the University of 
	Toronto. CGRA-ME is intended to facilitate research on new CGRA 
	architectures and new CAD algorithms. Given the current surge in research 
	interest in CGRAs from both industry and academia, this tutorial aims to 
	provide valuable insights and practical guidance in this dynamic 
	field.\n	\n	Speakers\n	\n	- Dr. Jason Anderson, Professor, University of 
	Toronto, Toronto, Canada\n	- Dr. Boma Adhi, Researcher, RIKEN Center for 
	Computational Science, Kobe, Japan\n	- Omar Ragheb, Ph.D. Candidate, 
	University of Toronto, Toronto, Canada\n	- Stephen Wicklund, MASc. 
	Candidate, University of Toronto, Toronto, Canada\n	\n	Target 
	Audience\n	\n	We invite DATE 2024 participants with a keen interest in 
	reconfigurable architectures and computer-aided design (CAD) tools. Please 
	join us!\n	\n	Learning objectives\n	\n	- A brief history of coarse-grained 
	reconfigurable arrays (CGRAs).\n	- An introduction to the CGRA-ME 
	framework.\n	- Details of the building blocks of the tool.\n	- Description 
	of the CAD algorithms utilized.\n	- Learning how CGRA architectures are 
	defined.\n	- Hands-on experimentation using CGRA-ME.\n	- Motivate future 
	research within the CGRA-ME framework.\n	\n	Required background\n	\n	- 
	Familiarity with C++ and Linux.\n	- A keen interest in learning about CGRA 
	architectures and CAD, or application acceleration using CGRAs.\n	- 
	Desirable: prior knowledge of reconfigurable hardware and associated 
	design methodologies.\n	\n	Detailed Program\n	\n	- Part 1: Lecture (45 
	mins)\n	- Part 2: Hands-on session (45 mins)
X-ALT-DESC;FMTTYPE=text/html:<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN"><HTML><HEAD><META 
	NAME="Generator" CONTENT="MS Exchange Server version 
	16.0.17231.20290"><TITLE></TITLE></HEAD><BODY><p>Get the latest session 
	information at <a 
	href="https://date24.date-conference.com/programme#ET03">https://date24.date-conference.com/programme#ET03</a></p><p>Coarse-grained 
	reconfigurable arrays (CGRAs) are programmable hardware devices within the 
	broader umbrella of reconfigurable architectures. They are promising 
	candidates for the realization of application accelerators. In contrast to 
	FPGAs, CGRAs are configurable at the word level, rather than the bit 
	level. This distinction positions CGRAs to deliver power, performance, and 
	area characteristics more closely aligned with custom ASICs. Notably, the 
	emergence of numerous machine-learning accelerator startups, such as 
	Tenstorrent, Groq, Cerebras, and SambaNova, offer architectures that 
	closely resemble CGRAs.</p><p>CGRA-ME is an open-source CGRA modeling and 
	exploration framework actively being developed at the University of 
	Toronto. CGRA-ME is intended to facilitate research on new CGRA 
	architectures and new CAD algorithms. Given the current surge in research 
	interest in CGRAs from both industry and academia, this tutorial aims to 
	provide valuable insights and practical guidance in this dynamic 
	field.</p><h4>Speakers</h4><ul>	<li>Dr. Jason Anderson, Professor, 
	University of Toronto, Toronto, Canada</li>	<li>Dr. Boma Adhi, Researcher, 
	RIKEN Center for Computational Science, Kobe, Japan</li>	<li>Omar Ragheb, 
	Ph.D. Candidate, University of Toronto, Toronto, Canada</li>	<li>Stephen 
	Wicklund, MASc. Candidate, University of Toronto, Toronto, 
	Canada</li></ul><h4>Target Audience</h4><p>We invite DATE 2024 
	participants with a keen interest in reconfigurable architectures and 
	computer-aided design (CAD) tools. Please join us!</p><h4>Learning 
	objectives</h4><ul>	<li>A brief history of coarse-grained reconfigurable 
	arrays (CGRAs).</li>	<li>An introduction to the CGRA-ME 
	framework.</li>	<li>Details of the building blocks of the 
	tool.</li>	<li>Description of the CAD algorithms 
	utilized.</li>	<li>Learning how CGRA architectures are 
	defined.</li>	<li>Hands-on experimentation using 
	CGRA-ME.</li>	<li>Motivate future research within the CGRA-ME 
	framework.</li></ul><h4>Required background</h4><ul>	<li>Familiarity with 
	C++ and Linux.</li>	<li>A keen interest in learning about CGRA 
	architectures and CAD, or application acceleration using 
	CGRAs.</li>	<li>Desirable: prior knowledge of reconfigurable hardware and 
	associated design methodologies.</li></ul><h4>Detailed 
	Program</h4><ul>	<li>Part 1: Lecture (45 mins)</li>	<li>Part 2: Hands-on 
	session (45 mins)</li></ul></BODY></HTML>
UID:DATE-ET03-20240326T083000-20240326T100000
END:VEVENT
BEGIN:VTIMEZONE
TZID:Europe/Madrid
TZURL:http://tzurl.org/zoneinfo/Europe/Madrid
X-LIC-LOCATION:Europe/Madrid
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:19810329T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=-1SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:19961027T030000
RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=-1SU
END:STANDARD
BEGIN:STANDARD
TZOFFSETFROM:-001444
TZOFFSETTO:+0000
TZNAME:WET
DTSTART:19010101T000000
RDATE:19010101T000000
END:STANDARD
END:VTIMEZONE
END:VCALENDAR