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DTSTART;TZID=Europe/Madrid:20240326T150000
DTEND;TZID=Europe/Madrid:20240326T154500
LOCATION:Break-Out Room S1+2
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SUMMARY:ADC ARM Design Contest
URL;VALUE=URI:https://date24.date-conference.com/programme#ADC
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DESCRIPTION:Get the latest session information at
https://date24.date-conference.com/programme#ADC\n\n\nOrganizers:\n John
Darlington, University of Southampton, UK\n Richard Buttrey, Arm,
UK\n Becky Ellis, Arm, UK\n Peter Groos, Cadence, DE\n \n Arm and the
University of Southampton have launched SoC Labs, a global meeting place
for academics to learn from one another and identify and collaborate on
SoC Design projects based on Arm. In order to foster great SoC design work
and research collaboration, SoC labs began a series of design contests.
Following their successful 2023 design contest at IEEE SOCC, SoC Labs
supported by Arm are here at DATE to present their ‘Understanding Our
World SoC Design Contest’ - which will be back at DATE ‘25 to present
its project outcomes.\n SoC Labs, is pleased announce a ‘Understanding
Our World’ research and teaching design contest at DATE. There are
opportunities for the best entries to be sponsored to attend a special
session at DATE 2025. Research groups interested in taping-out their
designs have an opportunity to join a shuttle, where there will be a
contribution towards the cost.\n \n Come and join us to hear more about
participating in the design contest, SoC Labs and how to gain access to a
wide suite of Arm IP to empower your SoC designs and accelerate your
research.\n \n There are many challenges to address in the world, not
least those encapsulated in the UN Sustainable Development Goals (SDGs).
Many real-world problems need improved real time understanding of
environments of different kinds and our impact upon them. Sustainable
monitoring and management of the external environment demands efficient
gathering of data for compute to act on as the first stage of unlocking
solutions - from climate change, deforestation, pollution to water use and
beyond. Gathering various kinds of real-world data has its own challenges
in terms of analogue to digital signal conversion and the related design
of an efficient SoC.\n \n The design contest has two tracks: (1) one based
around collaboration/ education where we focus on skills development and
working with others, including re-use and repurposing designs. For this
track we are more interested to hear about the journey itself rather than
unique hardware designs (2) a second based on hardware implementation
which includes FPGA and ASIC, looking for mixed signal SoC designs.
Analogue/ digital mixed signal designs are important in understanding our
world in areas such as energy efficiency, calibration, noise and generally
bringing data into the SoC. We are looking for contest submissions from
both early career and experienced researchers.
X-ALT-DESC;FMTTYPE=text/html:Get the latest session
information at https://date24.date-conference.com/programme#ADC
Organizers:
John Darlington, University of Southampton, UK
Richard Buttrey, Arm,
UK
Becky Ellis, Arm, UK
Peter Groos, Cadence, DE
Arm and
the University of Southampton have launched SoC Labs, a global meeting
place for academics to learn from one another and identify and collaborate
on SoC Design projects based on Arm. In order to foster great SoC design
work and research collaboration, SoC labs began a series of design
contests. Following their successful 2023 design contest at IEEE SOCC, SoC
Labs supported by Arm are here at DATE to present their ‘Understanding
Our World SoC Design Contest’ - which will be back at DATE ‘25 to
present its project outcomes.
SoC Labs, is pleased announce a
‘Understanding Our World’ research and teaching design contest at
DATE. There are opportunities for the best entries to be sponsored to
attend a special session at DATE 2025. Research groups interested in
taping-out their designs have an opportunity to join a shuttle, where
there will be a contribution towards the cost.
Come and join us
to hear more about participating in the design contest, SoC Labs and how
to gain access to a wide suite of Arm IP to empower your SoC designs and
accelerate your research.
There are many challenges to address in
the world, not least those encapsulated in the UN Sustainable Development
Goals (SDGs). Many real-world problems need improved real time
understanding of environments of different kinds and our impact upon them.
Sustainable monitoring and management of the external environment demands
efficient gathering of data for compute to act on as the first stage of
unlocking solutions - from climate change, deforestation, pollution to
water use and beyond. Gathering various kinds of real-world data has its
own challenges in terms of analogue to digital signal conversion and the
related design of an efficient SoC.
The design contest has two
tracks: (1) one based around collaboration/ education where we focus on
skills development and working with others, including re-use and
repurposing designs. For this track we are more interested to hear about
the journey itself rather than unique hardware designs (2) a second based
on hardware implementation which includes FPGA and ASIC, looking for mixed
signal SoC designs. Analogue/ digital mixed signal designs are important
in understanding our world in areas such as energy efficiency,
calibration, noise and generally bringing data into the SoC. We are
looking for contest submissions from both early career and experienced
researchers.
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